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nsantana
55cdbdb59c
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
common
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
constraints
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
my_source
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
script
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
source
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
create_proj.tcl
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
Makefile
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
mem_init_sys.txt
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
recreate.tcl
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
system_bd.tcl
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
system_constr.xdc
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
system_project.tcl
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
system_top.v
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
timing_constr.xdc
moving repo from git to local repo
2026-05-29 13:36:02 -07:00
S
Description
No description provided
287
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0
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7
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0
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Languages
Tcl
83.6%
VHDL
11.8%
Verilog
4.4%
Makefile
0.2%
