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more updates for address map

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nsantana
2026-06-03 00:53:45 -04:00
parent 68b9ef3d6b
commit f2906ec2b4
1 changed files with 35 additions and 2 deletions
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readme.md
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@@ -156,7 +156,24 @@
|0xFC | 31:0 | reg63 | reserved | | R/W |
| | | | | ||
## CMAC_1 Ethernet Interface Registers Base Address: 0x8101_0000
## CMAC_1 Ethernet Core Registers Base Address: 0x8101_0000
| Address<br>Offset | Bit | Register Name | Bit(s) Name |Description | Read/Write |
| :--- | :----: | :-------: | :-------- | :-------- | :----: |
|0x00 | 31:1<br>0 | reg0 | gt_reset_reg | Reserved<br>1 = Reset, self-clearing | R/W |
| | | | | ||
|0x04 | 31:0 | reg1 | reset_reg | | R/W |
| | | | | ||
|0x0C | 31:1<br>0 | reg2 | configuration_tx_reg1 | Reserved1<br>0 = Disable, 1 = Enable | R/W |
| | | | | ||
|0x14 | 31:1<br>0 | reg4 | configuration_rx_reg1 | Reserved1<br>0 = Disable, 1 = Enable | R/W |
| | | | | ||
|0x24 | 31:16<br>15:8<br>7:0 | reg5 | core_version_reg | Reserved<br>Major Version<br>Minor Version | R/W |
| | | | | ||
|0x90 | 31:1<br>0 | reg6 | gt_loopback | Reserved<br> 0 = Normal,<br>Near End PMA Loopback | R/W |
| | | | | ||
## CMAC_1 Ethernet Interface Registers Base Address: 0x8100_0000
| Address<br>Offset | Bit | Register Name | Bit(s) Name |Description | Read/Write |
| :--- | :----: | :-------: | :-------- | :-------- | :----: |
@@ -193,7 +210,23 @@
|0x58 | 31:0 | reg22 | rx_fifo_overflow_cnt | ????? | R |
| | | | | ||
## CMAC_4 Ethernet Interface Registers Base Address: 0x8201_0000
## CMAC_4 Ethernet Core Registers Base Address: 0x8201_0000
| Address<br>Offset | Bit | Register Name | Bit(s) Name |Description | Read/Write |
| :--- | :----: | :-------: | :-------- | :-------- | :----: |
|0x00 | 31:1<br>0 | reg0 | gt_reset_reg | Reserved<br>1 = Reset, self-clearing | R/W |
| | | | | ||
|0x04 | 31:0 | reg1 | reset_reg | | R/W |
| | | | | ||
|0x0C | 31:1<br>0 | reg2 | configuration_tx_reg1 | Reserved1<br>0 = Disable, 1 = Enable | R/W |
| | | | | ||
|0x14 | 31:1<br>0 | reg4 | configuration_rx_reg1 | Reserved1<br>0 = Disable, 1 = Enable | R/W |
| | | | | ||
|0x24 | 31:16<br>15:8<br>7:0 | reg5 | core_version_reg | Reserved<br>Major Version<br>Minor Version | R/W |
| | | | | ||
|0x90 | 31:1<br>0 | reg6 | gt_loopback | Reserved<br> 0 = Normal,<br>Near End PMA Loopback | R/W |
| | | | | ||
## CMAC_4 Ethernet Interface Registers Base Address: 0x8200_0000
| Address<br>Offset | Bit | Register Name | Bit(s) Name |Description | Read/Write |
| :--- | :----: | :-------: | :-------- | :-------- | :----: |